Computer systems are well known in the art. In particular, a computer system adhering to the “IBM PC” standard is well known in the art. Referring to FIG. 1, there is shown a computer system 10 of the prior art. The computer system 10 conforms to the “IBM PC” architecture. The system 10 comprises typically a motherboard 12 on which are mounted a variety of components such as a processor 14, such as a Pentium microprocessor made by Intel Corporation, a memory controller hub (MCH) chip 16, and a IO controller hub (ICH) chip 18. The MCH 16 and the ICH 18 are known as chipsets and can be obtained from Intel Corporation. The motherboard 12 also comprises a BIOS memory 20 which is typically a non-volatile memory device and a system embedded controller (EC) 21 which communicates with keyboard (KB) 73 and mouse 74. The MCH chip 16 also interfaces with or may be integrated with (i.e. embedded within) a graphics controller chip 62, which outputs its video signal to a video display port 30, typically a VGA port 30 and to a video device (not shown), such as an LCD display or CRT display. The foregoing system is described and is disclosed in U.S. Pat. No. 6,421,765. See also U.S. Pat. No. 6,330,635.
Intel Corporation, a developer of the MCH chip 16, also developed the ICH chip 18 which has a particular feature known as a low pin count (LPC) bus. See, for example, U.S. Pat. No. 5,991,841. The LPC bus 66 connects the ICH chip 18 through its on-chip LPC bus interface 19 to the BIOS memory 20 (through the LPC interface 50) and the system EC 21. At the time that Intel Corporation introduced the LPC bus 66, it disclosed that the LPC bus 66 is operable in accordance with the standard as disclosed in FIG. 2. This is also disclosed in U.S. Pat. No. 5,911,841. The LPC bus 66 comprises four signal lines between the ICH chip 18 and the peripheral devices such as the BIOS memory device 20. Along the four signal lines, designated as LAD [3:0], are supplied command, data and address signals. As shown in FIG. 2, the initial field for the LAD bus is a start field. This is then followed by the address and the data signals. In addition, the LPC bus 66 has LCLK and LFRAME# control signals.
From time to time, a need arises to reprogram the BIOS memory 20 without first booting up the system, such as in the case when the entire BIOS code, including the boot code, is corrupted. However, once a computer, such as a PC is assembled, with the motherboard 12 having peripherals attached and encased, it becomes difficult to reprogram the BIOS memory 20 without disassembling the computer system. Hence there is a need to provide a mechanism by which the non-volatile memory 20 of the motherboard 12 or the computer system can be reprogrammed with ease.